With reduced dimensions and increased density of flip chip semiconductor packages, a flip chip bonding has been developed which allows bare chips to be mounted directly on a substrate. Moreover, a hand-held equipment such as a camera-integrated VTR or a cellular phone has recently appeared one after another which is mounted with small-sized packages, so-called CSPs (chip size/scale packages) which have substantially the same dimensions as those of the bare chips. In such circumstances, a demand of market for the CSPs is significantly increased, inducing a recent rapid development of the CSPs.
A main board for circuit boards is used for the manufacture of the flip chip semiconductor packages in the form of the CSPs. The main board consists of a plurality of circuit boards which are integrally arranged and formed. Both side surfaces of each circuit board are formed with electrode pads (hereinafter referred to as bonding pads) for mounting IC chips thereon and with electrode pads for external connections which are electrically connected via through-holes and the bonding pads. After the mounting of the IC chips thereon, the main board is separated into the plurality of circuit boards.
Referring now to FIGS. 10(A)-10(F), description is made for a process for forming a conventional aggregated circuit board.
FIGS. 10(A)-10(F) are process diagrams for explaining the board formation process of the main board for circuit boards.
Prior to the formation of the main board, an insulating base material 101 is first prepared which is made of ceramics or resin and in which both side surfaces are clad with copper films 102 (FIG. 10(A)).
A through-hole 103 is then formed in this copper-clad base material 101 (FIG. 10(B)).
By means of electroless copper plating or electrolytic copper plating, a copper plating layer 104 is formed on the both side surfaces of the base material 101 having the through-hole 103 formed therein (FIG. 10(C)). The copper plating layer 104 is formed on the copper films 102 and on the side wall of the through-hole 103. This copper plating layer 104 allows the both side surfaces of the base material 101 to electrically conduct to each other.
A filler material 105 such as resin is then filled into the through-hole 103 (FIG. 10(D)).
The copper plating layer 104 is further laminated with plating resists which are in sequence exposed to light and developed to form a pattern mask (not shown). Afterward the copper plating layer 104 is subjected via this pattern mask to a pattern etching using an etching liquid or the like. As a result of this pattern etching, a plurality of connecting portions (bonding patterns) 3 for IC connections is arranged on the top surface side of the main board 100, with the formation of electrode pads 4 for external connections in the form of pads arranged on the bottom surface side in a matrix manner (FIG. 10(E)).
Solder resist processing is then carried out to form a solder resist film 106 on the bottom surface side of the main board 100 (FIG. 10(F)). This solder resist film 106 has openings which allow the connecting portions 3 for IC connections and the electrode pads 4 for external connections to be partially exposed. Portions of the connecting portions 3 for IC connections and of the electrode pads 4 exposed in the openings form respectively bonding pads 3a which are solderable regions and electrode pads 4a for external connections. By virtue of the formation of this solder resist film 106, the surface of the main board 100 becomes flattened. Furthermore, a gold plating (not shown) is usually provided on the surfaces of the bonding pad 3a and the electrode pad 4a.
Thus, there is finished the main board 100 having a multiplicity of solderable regions of the same geometry arranged on its surface in a matrix manner.
Referring is then made to FIGS. 11(A) to 12(B) to schematically describe a method for manufacturing a BGA (ball grid array) of a flip chip having solder ball electrodes formed on its circuit board, the method being an example of a conventional method for manufacturing a CSP flip chip semiconductor package.
In FIGS. 11(A) to 11(C) and in FIGS. 12(A) and 12(B), top plan views are on the right side of the diagrams and sectional views taken along respective cutting lines of the top plan views are on the left side of the top plan views.
It is to be noted that FIGS. 11(A) to 12(B) illustrate examples in which four circuit boards 1 are formed therefrom for convenience.
The conventional semiconductor package manufacturing process includes a main board formation process (FIG. 11(A)), an IC chip mounting process (FIG. 11(B)), a resin sealing process (FIG. 11(C)), a reference member attachment and electrode formation process (FIG. 12(A)) and a dicing process (FIG. 12(B)).
For the manufacture of the BGA, the main board 100 formed by the above main board formation process (FIG. 11(A)) is prepared.
Although in FIG. 11(A) the connecting portions 3 for IC connections and the electrode pads 4 for external connections are diagrammatically shown as raised portions, the connecting portions 3 for IC connections and the electrode pads 4 for external connections are actually in the form of recessed portions as set forth above.
Then, prior to the mounting of the IC chips, solder bumps 5 are formed on top of pad electrode faces of an IC wafer (not shown). Known as the method for forming these solder bumps 5 are, for example, a stud bump method, a ball bump method and a plating bump method, etc. Among these methods, the plating bump method is effective for the downsizing of the IC chips since it allows the bumps to be formed in narrow arrays between the pad electrodes.
The IC wafer having solder bumps formed thereon is then cut into predetermined chip sizes while being adhered to an adhesive tape, to form IC chips 6. In the cutting, use is a device such as a dicing saw to cut the IC wafer in X and Y directions in a full-cut mode. Afterward, the IC chips 6 on the adhesive tape are separated into unitary components.
Then, in the IC chip mounting process, as shown in FIG. 11(B), flip chips are mounted one by one on the associated circuit boards of the main board 100. For the flip chip mounting, flux (not shown) is first applied to any predetermined positions on the connecting portions 3 for IC connections (see FIG. 11(A)) formed on the solder bumps 5 or on the top surface side of the main board 100. Afterward, the IC chips 6 are placed one by one for each circuit board 1 on the main board 100. For the placement, the surface side of the IC chips 6 having the solder bumps 5 formed thereon is made to confront the top surface side of the main board 100, with the solder bumps 5 being positioned on the connecting portions 3 for IC connections. Subsequently, solder reflow is carried out to electrically connect the connecting portions 3 for IC connections to these IC chips 6. Thus, the IC chips 6 are mounted on the main board 100.
Then, in the sealing process, use is a thermosetting sealing resin 7 to perform side potting over a plurality of adjacent IC chips 6, to thereby integrally resin seal the plurality of IC chips 6. By virtue of this, as shown in FIG. 11(C), the IC chips 6 are fixed on the individual circuit boards 1 of the main circuit board 100 with facedown in a sealed manner.
Then in the reference member attachment process, the top surfaces of the IC chips 6 mounted on the main board 100 are adhesively attached on the reference member 8 by means of fixing means such as an adhesive agent or an adhesive tape.
Then, in the electrode formation process, solder balls are first secured to the electrodes 4a for external connections formed on the bottom surface side of the individual circuit boards 1. Then, the solder balls are subjected to reflow to form solder ball electrodes 9 as shown in FIG. 12(A).
Then, in the dicing process, as shown in FIG. 12(B), the main board 100 is cut along cut lines 2 in the X and Y directions formed in the main board 100 by use of cutting means such as the dicing saw as shown in FIG. 12(B). Then, the circuit boards which are cut (the cut circuit boards) are separated into individual circuit boards 1.
Afterward, the adhesive agent or the like is dissolved by a dissolving liquid or the like to release the circuit board 1 from the reference member 8.
Through the above processes, the flip chip BGA (ball grid array) as an example of the flip chip semiconductor package is finished.
By the way, the positions of the cut lines 2 are determined with respect to register as a reference indicative of cutting positions, formed on the main board 100.
Herein, FIG. 13(A) is a bottom plan view of the main board 100 having positioning signs for cutting thereon. A plurality of rectangular positioning signs 11 is formed in the peripheral regions other than the circuit boards 1 of the main board 100. The cut lines pass through the pair of positioning signs 11. In addition, two rectangular positioning signs in cooperation determine the position of each cut line 2.
FIG. 13(B) is a sectional view of the positioning signs 11 taken along a line 13(B)--13(B) in FIG. 13(A). As shown FIG. 13(A), the positioning signs are formed as metal parts made of, e.g., copper on the base material 101.
FIG. 13(C) is a sectional view of the electrode pads 4a taken along a line 13(C)--13(C) in FIG. 13(A). As shown in FIG. 13(C), the solder resist 106 covers the peripheral portions of the electrode pads 4 for external connections formed on the base material 101. Therefore, exposed portions of the electrode pads 4 for external connections form the electrode pads 4a.
Japanese Patent Laid-open Pub. No. Hei8-153819 discloses another example of the high-density main board allowing a multiplicity of circuit boards to be acquired therefrom. FIG. 14 is a top plan view of the main board disclosed in this publication. As shown in FIG. 14, this main board 110 is of a strip-like shape and has working holes 12 formed at its four corners. FIG. 14 shows an example of the main board 110 for acquiring two circuit boards therefrom.
This main board 110 is formed as follows. That is, after the formation of through-holes in the main board 110, a copper plating layer is formed and patterned to form common electrode pads 14 and circuit patterns electrically conducting to these common electrode pads 14. Then, the both side surfaces of the main board 110 are laminated with dry films. At that time, there remain exposed the connecting portions of the IC chips, bonding wires and solder bumps, and the common electrode pads 14 among the circuit patterns. Furthermore, a voltage is applied to the common electrode pads 14 to form Ni--Au plating layer on the exposed connecting portions. Then, by means of a router machining, elongated apertures 16 are formed in each circuit board 1 along its four edges, leaving joining portions 15 at four corners of each circuit board 1. The main board 110 is thus formed.
Furthermore, the IC chips are mounted on the top surface of the main board 110 and solder ball electrodes (solder bumps) for external connections are formed on the bottom surface thereof, and after that, the joining portions 15a are severed along separation lines 15 by press cutting to obtain the BGA. Upon the press cutting, the circuit board 1 is not subjected to any excessive load due to the reduced width of the joining portions 15a, achieving an extremely easy cutting.
Referring then to FIGS. 15(A)-15(G), description is made for processes in which the IC chips are mounted on the main board 110 with the formation of the solder ball electrodes to manufacture the BGA. FIGS. 15(A)-15(G) are process diagrams in section for explaining a method for manufacture of the BGA.
First, FIG. 15(A) diagrammatically shows the main board 110 shown in FIG. 14.
In FIG. 15(A), there are invisible circuit patterns such as the common electrode pads 14, the through-holes 103 and the elongated apertures 16 which are shown in FIG. 14. Instead, the outer periphery of the circuit board 1 is diagrammatically shown.
The IC chips 6 are then mounted one by one on the top surface of each circuit board 1 of the main board 110 by means of a free chip method or a wire bonding method (FIG. 15(B)).
The mounted IC chips 6 are then hermetically sealed with a resin (FIG. 15(C)).
Solder ball electrodes 9 are then formed for each circuit board 1 on the bottom surface of the main board 110 (FIGS. 15(D) and 15(E)).
Incidentally, FIG. 15(D) shows the bottom surface of the main board 110 and FIG. 15(E) is a sectional view of the main board 110 having the solder ball electrodes 9 formed thereon.
The semiconductor package is then separated into individual circuit boards 10 by press cutting to obtain the BGA (FIGS. 15(F) and 15(G)).
Incidentally, FIG. 15(F) is a bottom plan view of the BGA and FIG. 15(G) is a sectional view of the BGA.
Referring then to FIGS. 16(A)-16(C), description is made for a method for forming the solder ball electrodes 9. FIG. 16(A) is a bottom plan view of the main board 110. For the formation of the solder ball electrodes 9, flux 9a is applied to the electrode pads 4a for external connections by using the working holes 12 as reference, and after that, solder balls 9b are placed thereon (FIG. 16(B)). Reflow is then carried out to integrate the flux 9a with the solder balls 9b to thereby form solder ball electrodes 9 in the form of projecting electrodes (FIG. 16(C)).
It is to be noted in FIGS. 16(B) and 16(C) that the process for forming a solder ball electrode 9 in a single electrode pad 4a is typically shown.
The BGA as the semiconductor package is then mounted on a mother board. A block diagram of FIG. 17 illustrates a process for the mounting of the BGA onto the mother board. For the mounting onto the mother board, a mother board is first supplied (step B1).
A soldering paste is then printed on electrode portions of the mother board (step B2). on the other hand, a semiconductor package (BGA) is manufactured in advance by the above processes (step B3).
Then, for the mounting of the BGA onto the mother board, the solder ball electrodes of the BGA are registered with the electrode portions of the mother board using the quadrangular external shape of the BGA as reference (step B4).
The BGA is then placed on the mother board (step B5).
Reflow is then carried out to connect the solder ball electrodes of the BGA to the electrode portions of the mother board (step B6).
The mother board and the BGA are finally cleaned to complete the mounting process onto the mother board (step B7).
A block diagram of FIG. 18 shows another process for mounting the BGA onto the mother board. For the mounting onto the mother board, a mother board is first supplied (step C1).
Soldering paste is then printed on electrode portions of the mother board (step C2).
On the other hand, a semiconductor package (BGA) is manufactured in advance by the above processes (step C3).
Then, for the mounting of the BGA onto the mother board, the solder ball electrodes of the BGA are registered with the electrode portions of the mother board using the arrangement of the solder ball electrodes as reference instead of the external shape of the BGA (step C4). That is, by recognizing the arrangement pattern of the solder ball electrode on the bottom surface of the BGA, registration is effected between the solder ball electrodes and the electrode portions. In addition, the recognition of the arrangement pattern enables the directionality of the BGA relative to the mother board to be verified.
The BGA is then placed on the mother board (step C5).
Furthermore, reflow is carried out to connect the solder ball electrodes of the BGA to the electrode portions of the mother board (step C6 of FIG. 18).
The mother board and the BGA are finally cleaned to complete the mounting of the BGA onto the mother board.
By the way, the positions of the positioning portions for cutting shown in FIGS. 13(A)-13(C) are usually determined by a process which is different from the process for defining the shape of the electrode pads for external connections. That is, in the example of FIG. 13(B), the shape of the positioning portions 11 for cutting is determined by the shape of the copper patterns. On the contrary, in the example of FIG. 13(C), the shape of the electrode pads 4a is determined by the shape of the openings of the solder resist 106 since the peripheral portions of the electrode pads 4 for external connections are covered by the solder resist 106. As a result of this, a problem has arisen that positional accuracy of the positioning portions relative to the positions of the electrode pads 4a is poor. For this reason, there has sometimes been seen a lowering in accuracy, relative to the positions of the electrode pads 4a, of the positions of the cut lines 2 determined by the positions of the positioning signs 11 shown in FIG. 13(A).
Furthermore, occurrence of errors in the positions of the cut lines 2 may result in occurrence of an error in the position of external shape of the BGA relative to the positions of the electrode pads 4a. As a result of this, if the BGA is mounted on the mother board with the external shape of the BGA as reference, the positions of the solder ball electrodes formed on the electrode pads 4a of the BGA may be offset relative to the positions of the electrode portions of the mother board. Then, in some instances, a defective contact may occur between the solder ball electrodes and the electrode portions of the mother board.
Furthermore, in the case of the main board 110 shown in FIGS. 16(A)-16(C), the positions of the electrode pads 4a for external connections are determined by using the working holes 12 as reference. However, the opening accuracy of the working holes 12 is constant, making it difficult to secure a positional accuracy exceeding a certain level of the electrode pads 4a relative to the positions of the working holes 12. As a result of this, there arose a problem that in case a higher positional accuracy is demanded due to narrower pitches of the electrode pads, the positional accuracy using the working holes 12 as reference may become insufficient.
Furthermore, the working holes 12 are used also as reference for determining the positions of the elongated apertures 16 of the main board 110 shown in FIG. 14. For this reason, the position of the external shape of the circuit board 1 determined by a part of the shape of the elongated aperture 16 is also determined by using the working holes 12 as reference. However, the positional accuracy of the external shape of the circuit board 1 may not sufficiently be high in the case of using the working holes 12 as reference. In addition, the positional accuracy of the electrode pads 4a relative to the external shape whose positions are both determined by using the working holes 12 as reference is not sufficiently high either. For this reason, as shown in FIG. 17, if the BGA is mounted on the mother board using the external shape of the circuit board 1 as reference, the positions of the solder ball electrodes formed on the electrode pads 4a of the BGA may be offset relative to the positions of the electrode portions of the mother board. Then, in some instances, a defective contact may occur between the solder ball electrodes and the electrode portions of the mother board.
In addition, upon mounting of the BGA onto the mother board, it was sometimes difficult to judge the direction of the BGA using the external shape as reference since the external shape of the circuit board is usually rectangular. For this reason, the circuit board may possibly be unaware that the mounting direction is wrong even though the BGA has turned through 90 degrees or 180 degrees relative to the correct mounting direction.
Furthermore, when mounting the BGA onto the mother board through the recognition of the arrangement pattern of the solder ball electrodes, the overall surface on the bottom side of the circuit board is recognized. For this reason, there arose a problem that a larger recognition area requires a more recognition time, resulting in a longer cycle time and hence in a lower productivity. A further problem lays in that a necessity for the pattern recognition of a wider area upon mounting may bring about a rise of price of the mounting device.
In addition, it was sometimes difficult upon mounting of the BGA onto the mother board to judge the direction of the BGA in spite of the recognition of the arrangement pattern if the arrangement pattern of the solder ball electrodes is symmetrical with respect to a line or a point. For this reason, the circuit board may possibly be unaware that the mounting direction is wrong even though the BGA has turned through 90 degrees or 180 degrees relative to the correct mounting direction.
Therefore, in view of the above problems, the object of the present invention is to provide an electronic component device having positioning signs formed with a high positional accuracy relative to the positions of electrode pads for external connections, a method for manufacturing the same, and a main board.